nav[aria-label="Primary Navigation"] { padding: 0; & ul { list-style: none; width: 100%; display: flex; flex-direction: row; justify-content: start; align-items: start; gap: 30px; padding: 0; & li { margin: 0; } & ul li { list-style: none; } } }

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Han Cheng Wu

He is currently a senior quality engineer at STATS ChipPAC Semiconductor (Jiangyin).

Senior Quality Engineer - STATS ChipPAC Semiconductor (Jiangyin)

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