Hi All,
I put together an example of using custom maping to highlight spatial defects in semiconductor floorplans and wafer maps.
This technique was previously presented at Discovery 2015:
https://community.jmp.com/t5/Discovery-Summit-2015/System-on-Chip-SOC-Yield-Visualization-Using-Custom-Heat-Maps-in/ta-p/22797
This can be used as method to showcase JMP's ability to identify, both visually and interactively, spatial signatures within your data.
Install Notes:
Before opening "IC_Floorplan.jmp" install the files below in the "Maps" folder where JMP is locally installed, (Ex: C:\Program Files\SAS\JMPPRO\13\Maps).
"IC_Layout-Name.jmp"
"IC_Layout-XY.jmp"
Custom Floorplan Heat Map
Custom Floorplan w/ Wafer Map